Parity Generator and Checker

What is the meaning of parity?

The meaning of parity is “equality” or “equivalence”.  So from this meaning, we can understand the use of parity bit in the combinational logic circuits. We use parity bit in the combinational circuits to check whether the input data at the transmission end and receiving end are equal or not.

Purpose of using parity bit in combinational circuits

All of the Data transmission in the digital systems does not occur without any distortion or noise during transmission. So we lose some data or information through our way. Some of our 1s changes into 0s during transmission and some of our 0s changes into 1s. So to overcome this error or problem, we use parity bit in our combinational logic circuits.

What parity bit does?

Parity bit converts the numbers of 1s of the data, into even numbers of 1s or the odd number of ones. If there are even numbers of 1s in the data then parity bit will be 0 and if there are odd numbers of 1s in the data then parity bit will be 1. So parity bit combined with the information or data is transmitted through the channel towards the receiving end. At the receiving end, we check whether the data have the same numbers of 1s, as parity bit says. If numbers of 1s are odd and the parity bit is 0 then it means there is an error in the information.

Parity Generator and Parity checker

A parity generator is a circuit that is used to generate a parity bit for the transmission end so that it can be combined with it. While parity checker is the circuit which is used to check whether parity bit matches the receiving information.

Parity Generator Explanation:-

In parity generator combinational circuit, we give n-1 number of inputs to it, n-1 means one less than n. one less is because that one is a parity bit, that parity generator circuit is going to generate. There are two types of Parity generator.

1. Even parity Generator
2.  Odd parity Generator

Even parity generator

In even parity generator, the aim is to convert all number of 1s in the data stream to the even numbers. How we are going to do this? We are going to do this by functioning parity. So that it gives “1” when there are the odd numbers of ones. And it gives ”0” when there are even numbers of ones. Below is the truth table of this.

Truth Table

So using K-map rule to simplify this truth table,

$$ X=A↖{-} B↖{-}C↖{} +A↖{-} B↖{} C↖{-}+A↖{} B↖{-}C↖{-}+A↖{}B↖{}C↖{} $$
$$ X=A↖{-} (B↖{-}C↖{}+B↖{} C↖{-})+A (B↖{-} C↖{-}+B↖{}C) $$
$$ X= \ov A(B ⊕C)+A \ov{ (B⊕C)} $$
$$ X=A⊕B⊕C $$

Circuit

So we can implement this equation by using two X-OR gates. Below the logic circuit is shown for the even parity generator.

Odd parity generator

In odd parity generator, the aim is to convert all number of 1s in the data stream to the odd numbers. How we are going to do this? We are going to do this by functioning parity bit. So that it gives “1” when there are even numbers of ones. And it gives ”0” when there are odd numbers of ones. Below is the truth table of this.

Truth Table

So using K-map rule to simplify this table,

$$ X=(A⊕B) \ X\NOR\ C $$

Circuit

We can implement this equation by using one X-OR gate and one X-nor gate. Below the logic circuit for the odd parity generator is shown below.

Parity Checker Explanation:

Parity checker circuit is present at the receiving end, it is used to check whether there is an error or not in the received information. In this circuit, we have 4-Bit of the message received. That includes 3-bit of message and 1-bit of parity bit which was generated by the parity generator (in parity generator we have 3-bit of data and then we get a parity bit at the output).  Like parity generator, it has also two types.

1. Even parity checker
2. Odd parity checker

Even parity checker

In even parity checker there must be even number of “1s” in the input. If there are even numbers of “1s” in input, that means our information is error-free, but if there are odd numbers of “1s” that means there is an error in the received information.

So we will design a truth table in which our parity checker bit (which is our output) will be “high” if there are even numbers of “1s” in the input otherwise parity bit checker will be “low” if there are odd numbers of ones. The truth table is shown below.

Truth Table

Using K-map to simplify this truth table,

$$ X = \ov {A B}\ (\ov C D + C\ov D ) + \ov A B\ (\ov {C D} + C D ) + A B\ (\ov C D + C\ov D ) + A \ov B \( \ov{C D} + C D ) $$
$$ \ov{A B}\ ( C ⊕ D) + \ov A B\ (\ov{ C ⊕ D}) + A B\ ( C ⊕ D) + A \ov B( \ov{C ⊕ D}) $$
$$ X = (\ov {A B} + A B)\ ( C ⊕ D) + (\ov A B + A\ov B )\ (\ov {C ⊕ D}) $$
$$ X = (A ⊕B) ⊕ ( C ⊕ D) $$

Circuit

We can implement the above equation by using three X-OR gates. If the number of input bits increases from 4-bit to 5-bit then we can increase one more X-OR gate.

Odd parity checker

In odd parity checker, there must be odd number of “1s” in the input. If there are odd numbers of “1s” in input, that means our information is error-free, but if there are even numbers of “1s” that means there is an error in the received information.

So we will design a truth table in which our parity checker bit (which is our output) will be “high” if there are odd numbers of “1s” in the input otherwise parity bit checker will be “low” if there are even numbers of ones. The truth table is shown below.

Truth Table

Using K-map to simplify this truth table,

$$ X = (A\ xnor\ B) \xnor\ (C\ \xnor\ D) $$

Circuit

So by observing the above equation, we can make the odd parity checker by using three X-NOR gates, the circuit is drawn below.

Common Base configuration of BJT (Voltage amplification)

In this type of configuration we have, the Base terminal of BJT is common with both input and output. Where input is provided to the Emitter and output is collected from the collector. The circuit of the configuration is shown in the figure below. This configuration is used for the voltage gain and current buffer. And we have an input impedance that is low and output impedance is high.

Application

Common base the configuration is not used for the low-frequency input signal and for low frequency operating circuit. Though it is used when there is low input impedance is connected or present. Such as preamplifier, in a where we have low signal and we have to strengthen it out. So there we use a common base configuration.
While mainly it is used for very high frequency and ultra-high frequency. It is because its input capacitance does not affect by the amplification process. Due to which high frequency does not degrade or change.

Circuit:

As you can see in the figure, that base is common with input and output, while Emitter is connected to the input, and the collector is connected to the output. There is a battery connected between base and emitter, to forward-biased base-emitter junction. To forward bias we need to connect the positive side of the battery to the P side of BJT and negative side of the battery to the N side of BJT (In PNP case emitter is P side and Base is N side). There is another battery connected between collector and base to reverse biased the collector-base junction. To do this we have connected the positive side with the base and negative side with the collector.

Working:

Current Gain

Let’s first see the current flow in this configuration. We all know that current flows from the positive terminal of the battery to the negative terminal of the battery. So, in this case, current I_E flows from V_BE towards the emitter, from there some of the current flows towards the base region which is I_B and remaining all the current goes towards the collector. So we can recall the equation,

I_E = I_B + I_C

I_E is the input current and I_C is the output current. So this equation shows that output current I_C can never be greater than input current I_E. So current gain could never be greater than 1. It will be “1” or “less than 1”.

Current Gain equation will be

$$ α= I_C/I_E , where\ "α"\ is \ current\ gain $$

Using this equation we can find out the current gain of a circuit.

Voltage gain

Now let’s see how it provides us the voltage gain (amplification).

As we have the current gain$$  α=I_C/I_E $$ 
And resistance gain              $$ = R_L/R_I_N , $$ So using Ohm’s law(V=IR), We get,
Voltage gain= Current gain x Resistance gain
Voltage gain = $$ I_C/I_E × R_L/R_I_N = {I_C R_L}/{I_E R_I_N} $$

So this equation shows that we can get the desired voltage gain by changing the amount of input and output resistance.

Input characteristics

Now let’s see what the input characteristics of the common base configuration are. Means when we change input voltages V_BE what effects does it has on input current I_E. And keeping the output voltage V_CB constant. We will plot a graph having V_BE on the x-axis as we are changing V_EB that’s why it is on the x-axis. While I_E will be on the y-axis. We will see that there is no current across input when V_EB is 0 to 0.6V. Because the starting voltage of the diode is 0.7V. So when V_EB cross 0.6 V. The I_E will start to grow up and will grow larger with small increase in voltage V_EB. So one case was with V_CB voltage was kept constant at 5V. Now observe another case with V_CB at 7V, and then with 10V. And at last plot a graph of all 3 cases as shown in the figure below.

Output characteristics

Now observe the output characteristics. We will change the output voltage V_CB and observe the change in output current I_C, with input current I_E will remain constant. So V_CB is on the x-axis because we will be changing it and I_C on the y-axis because it will be changed. We will observe that when we keep I_E constant at 0 and will change V_CB, it will have no effect on the I_C. I_C will remain zero at every value of V_CB (0V, 3V, 5V etc). While when we keep I_E constant at 1mA and change V_CB, then we will see I_C will come near to 1mA will remain constant for further increase in V_CB. Now keep I_E constant at 2mA, we will see that after changing V_CB, I_C will come near to I_E, means near to 2mA and will go constant for further increase in V_CB.Will draw plot for all the experiments. And we observe that I_C will never be greater than I_C. As equation 1 tells that.

Bipolar Junction Transistor(BJT) as a Amplifier

Amplification

As we have discussed the other uses of BJTs in previous posts, now there is another main use or advantage of Bipolar transistor is that it can amplify the input signal whether it is voltage or current. As some time we need to amplify the current and sometimes voltage. We provide an input signal to the BJT, and it produces the amplified signal at the output. The gain of the amplifier can be calculated by the ratio of output to the input value of current or voltage. The amplifier does not change the waveform or frequency. It just affects the current and voltage.

How to make BJT an Amplifier:

To make BJT work as amplifier we need to do some different types of configuration of it, in a circuit. There are three configurations, which we can do,

•        Common Base Configuration (only has voltage gain).
•       Common Emitter Configuration (has both voltage and current gain)
•       Common Collector Configuration (only has current gain)